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MP4575 5a, 4.5v - 55 v input, fre quency - p rogrammable , fully integrated , synchronous, st ep - down converter MP4575 rev. 1.0 www.monolithicpower.com 1 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. description the MP4575 is a frequency - programmable , step - down , switching converter with integrated , internal , high - side and low - side power mosfet s . the MP4575 can provide 5 a of continuous output current with peak current control for excellent transien t response and efficiency performance . the wide 4.5v to 55 v input voltage range accommodates a variety of step - down applications, including industrial, poe, automotive , and printer s with a dc high - voltage bus . the MP4575 uses peak - current - mode control to regulate the output voltage. the MP4575 provides over - current protection (ocp) with valley current detection , which is used to prevent the current from running a way. the MP4575 also has accurate and reliable o ver - voltage protection (o v p) and auto - recovery thermal protection. an optional external soft start is available. enable and power good indication function s can be used to track the power easily. to increase efficiency, the MP4575 scal es down the switching frequency automatically when the load is light. meanwhile, the low - side mosfet is turned off to reduce driver loss when zero inductor current is detected. synchronous operation mode with the integrated low - side mosfet is useful for reduc ing conduction loss and reducing external components space to save cost . the MP4575 is available in a ts sop - 20 ep package with an exposed pad . features ? wide 4.5v to 55 v input voltage range ? 9 0 m? and 7 0 m? internal high - side and low - side power mosfet s ? peak - current - mode control ? programmab le s witching f requency ? optional external soft start ? over - current protection (ocp) with valley current detection ? support s external synchronous clock ? over - voltage protection (ovp) ? current limit decreas es during output short for better therm al performance ? power good indication ? thermal shutdown protection ? available in a tssop - 20 ep p ackage applications ? poe input non - isolated buck ? industrial power systems ? printers and scanners ? automotive power systems ? distributed power systems all mps parts are lead - free, h alogen - free, and adhere to the rohs directive. for mps green status, please visit the mps website under quality assurance. mps and the future of analog ic technology are registered tradema rks of monolithic power systems, inc.
MP4575 C 5 a, 55 v, synchronous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 2 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical application o f f o n v i n e n s s v d d g n d f b b s t s w c 1 l 1 c 6 c 7 c 5 r 1 c 2 r 2 m p 4 5 7 5 f r e q c o m p r 3 r 4 c 3 p g v d d r 5 b i a s 5 v _ e x o r n c c 4
MP4575 C 5 a, 55 v, synchronous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 3 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. ordering information part number* package top marking MP4575gf tssop - 20 ep see below * for tape & reel, add suffix C z ( e. g. mp 4575gf C z) top markin g mp s : mps prefix y y : year code ww: week code MP4575 : product code of mp 4575gf lll llllll : lot number package reference tssop - 20 ep 2 6 7 8 vdd pg vin vin en sw gnd gnd comp freq fb bst nc 9 vin sw nc gnd bias ss agnd 1 20 3 4 5 19 18 17 16 15 14 13 12 11 10
MP4575 C 5 a, 55 v, synchronous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 4 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. absolute maximum ratings (1) supply voltage ( v i n ) ................................ .... 60v v sw ................................ ... - 0.5v to (vin + 0.5v) v bs ................................ ....................... v sw + 6v all other pins ................................ .. - 0.3v to +6v en sink cu rrent ................................ ........ 1 5 0 a continuous power dissipation (t a = 25c) (2) tssop - 20 ep ................................ ......... 2.78w junction temperature ............................... 150 c lead temperature ................................ .... 260 c storage temperature ................ - 65 c to +150 c reco mmended operating conditions supply voltage ( v in ) ....................... 4.5v to 55v output voltage ( v out ) ................... 1 v to 0.9 x v in operating junction temp . (t j ). .. - 40 c to +125 c thermal resistance ( 3 ) ja jc tssop - 20 e p ....................... 45 ....... 10 ... c/w notes : 1) absolute maximum ratings are rated under room temperature unless otherwise noted. exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature tj (max), the ju nction - to - ambient thermal resistance ja, and the ambient temperature ta. the maximum allowable continuous power dissipation at any ambient temperature is calculated by pd (max) = (tj (max) - ta)/ja. exceeding the maximum allowable power dissipation produces an ex cessive die temperature, causing the regulator to go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) measured on jesd51 - 7, 4 - layer pcb.
MP4575 C 5 a, 55 v, synchronous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 5 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. electrical character istics v in = 48 v, v en = 3.3 v, t j = 25 c , unless otherwise noted. parameter symbol condition min typ max units error amplifier (ea) feedback voltage v fb 4.5v vin 55 v 0. 98 1 1.02 v fb current i fb v fb = 1.07v 10 50 n a error amp transconductance 380 540 720 a/v comp sink/source current i comp 10 20 30 a switch characteristic upper switch on resistance r on _hs 9 0 1 60 m low er switch on resistance r on _ls 7 0 12 0 m upper switch leakage i lkg_sw v en = 0v, v sw = 0v 1 0 300 n a current limit peak current limit i limit 10% duty cycl e 5.5 8 .5 11 a quiescent supply quiescent supply current i q no load, without switching 450 670 a s hutdown supply current i shdn v en = 0v 7 12 a vdd regulator vdd regulator output voltage v dd bias = nc 3.4 3. 6 3.8 v vdd regulator output voltag e v dd bias = external 5v power 4.6 4. 8 v t hreshold voltage en rising thres hold v en_r 1.4 1. 6 1.8 v en f alling threshold v en_f 1.1 1.3 1.5 v en threshold hysteresis v en_hys 300 m v vin uvlo rising threshold v inuv_r 3.7 3.9 4.1 v vin uvlo falling threshold v inuv_f 3.3 3.5 3.7 v vin uvlo threshold hysteresis v inuv_hys 400 m v soft start (ss) exter nal soft start capacitor charging current i ss v ss = 1v 2.5 4 5.5 a pwm comparator minimum off time ( 4 ) t off_min 100 ns minimum on time ( 4 ) t on_min 9 0 ns
MP4575 C 5 a, 55 v, synchronous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 6 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. electrical character istics (continued) v in = 48 v, v en = 3.3 v, t j = 25 c , unless otherwise noted. parameter symbol condition min typ max units oscillator frequency switching frequency f s w r freq = 100k 400 5 2 0 640 khz over - voltage protection ( ovp ) output ovp t hreshold v ovp v fb(ovp) /v fb 108 1 1 5 122 % power goo d (pg) power good threshold v pg_th v out rising , v fb(pg) /v fb 86 90 94 % v out falling , v fb(pg) /v fb 81 85 89 power good hysteresis v pg_hys ? v fb(pg) /v fb 5 % power good delay t pg_dl v out rising 8 22 37 s v out falling 8 21 33 s frequency sync s ync leakage current i lkg_sync 10 100 na sync frequency range f sync 100 1000 khz thermal thermal shutdown ( 4 ) t sd 150 1 7 0 c thermal shutdown hysteresis ( 4 ) t sd_hys 10 c note : 4) derived from bench characterization. not tested in production.
MP4575 C 5 a, 55 v, synchronous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 7 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. ty pical characteristic s v in = 48v, unless otherwise noted.
MP4575 C 5 a, 55 v, synchronous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 8 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical characterist ics (continued) v in = 48v, unless otherwise noted .
MP4575 C 5 a, 55 v, synchronous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 9 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typi cal performance char acteristics v in = 4 8 v, v out = 3.3v, c out = 2x 22f, l = 10 h , f sw = 500khz, t a = +25 c, unless otherwise noted.
MP4575 C 5 a, 55 v, synchronous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 10 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) v in = 4 8 v, v out = 3. 3v, c out = 2x 22f, l = 10 h , f sw = 500khz, t a = +25 c, unless otherwise noted.
MP4575 C 5 a, 55 v, synchronous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 11 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) v in = 4 8 v, v out = 3.3v, c out = 2x 22f, l = 10 h , f sw = 500khz, t a = +25 c , unless otherwise noted.
MP4575 C 5 a, 55 v, synchronous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 12 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. pin functions pin # name description 1 comp compensation network set ting . connect an external resistor in series with a capacitor between comp and gnd. 2 fb feedback. fb is the input to the pwm comparator. place a n external resistor divider between the output and gnd . 3 freq switching frequency setting. connect a resistor from freq to gnd to set the switching frequenc y. if an external synchronous clock is applied to freq , the converter follow s this clock s frequency. 4 en enable input . pull en below the specified threshold to shut down the MP4575 . t here is no interna l pull - up or pull - down ci rcuit. do not float en . 5 bst bootstrap. bst is the positive power supply for the internal floating high - side mosfet driver. connect a capacitor between bst and sw. 6, 7, 8 vin input supply . vin supplies power to all of the internal control circuitries and vdd regulator. a decoupling capacitor to ground must b e placed close to vin to minimize switching spikes. 9, 12 nc no connection . leave nc floating . 10, 11 sw switch node . sw is the output node from the internal high - side mosfet source . 13, 14, 15, exposed pad gnd power ground for the internal power mosfets. 16 vdd power for the internal mosfet driver and bst charging circuit. 17 bias optional supply for the internal circuit . for better thermal performance, connect bias to an external 5v source. v dd and the internal circuit are powered by bias. since there is a diode between bias and the internal circuit, leave bias floating or connect it to gnd if bias is not used. 18 pg power good indicator . connect a resistor to a pull - up power source if used. 19 ss optional external soft - start time setting. connect an external capacitor between ss and gnd to set the soft - start time externally. float ss to activate the internal 0.5ms soft - start setting. 20 agnd ground for internal logic and signal circuit.
MP4575 C 5 a, 55 v, synchronous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 13 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. block diagram figure 1 : functional block d iagram i s w 1 v s s _ i n t e r n a l s s _ i n t e r n a l s s 4 0 0 m v p l l c l k f b f s w f o l d b a c k f r e q s e t t i n g p l l f s w s e t t i n g p l l o n c o m p f s w f o l d b a c k 1 1 0 % r e f 9 0 % r e f f b o c z c c l k z c s w l o w r b c p b l s d m o s q h s d m o s h s c u r r e n t l i m i t c o m p s w v i n b s t c l k l s d r v l l o w n o o c p g n d p g f b c o m p f r e q i n t e r n a l r e g u l a t o r ( 2 . 5 v ) v d d r e g u l a t o r ( 3 . 6 v o r 4 . 8 v ) v o l t a g e r e f e r e n c e c u r r e n t r e f e r e n c e t h e r m a l s h u t d o w n v i n u v l o h o u s e k e e p i n g b i a s 2 v c l k v d d i s w e n
MP4575 C 5 a, 55 v, synchronous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 14 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. operation the MP4575 is a step - down switching regulator with integrated , high - voltage , power mosfet s . the MP4575 features a wide input v oltage range, high efficiency, exte rnal and internal soft start , programmable frequency, and comprehensive prote ction mode s. pulse - width modulation ( pwm ) c ontrol the MP4575 uses peak - current - mode control to regulate the output voltage. a pwm cycle is initiated by the internal clock at the beginning of every cycle . after the high - side mosfet (hs - fet) turn s on , the inductor current rise s linearly to provide energy to the load . the hs - fet remains on until its current reaches the comp voltage (v comp ), which is the output of the internal error a mplifier (ea) . the output voltage of the ea depends on the difference of the output feedback voltage and the internal high - precision reference , and v comp decide s how much energy should be transferred to the load . the higher the load current, the higher v co mp . after the high - side switch is off, the low - side switch turns on , and the inductor current flow s through the low - side switch. to prevent a shoo t - through, a dead time is inserted to prevent the hs - fet and ls - fet from turn ing on at the same time. for each turn - on and turn - off in a switching cycle, the hs - fet remains on and off with a minimum on and off time limit . light - load operation the MP4575 can achieve high efficiency during light load in two ways. first, when the load current decreases, the inductor current drop s at same time . t he ls - fet turn s off to save driver loss when the inductor current drops to zero . second, when the load decreases, the switching frequency is scaled down to reduce switching loss after v comp drops below a certain threshold . err or amplifier (ea) the error amplifier (ea) compares the fb voltage with the internal reference and outputs a current proportional to the difference between the two. this current is used to charge the external compensation networks to form v comp , which is used to control the hs - fet peak current and regulate the output voltage. oscillator and sync function the internal oscillator frequency is set by a single external resistor (r freq ) connected between freq and gnd. the frequency - setting resistor should be lo cated close to the device. the relationship between the oscillator frequency and r freq is shown in table 1 on page 17 . during light load, the switching frequency is scaled down according to v comp . the switching frequency begins decreasing when v comp is bel ow about 0.8 v. switching is disabled when v comp drops below about 0. 7 v . to reduce switching loss and thermal dissipation , the switching frequency is decreased according to the fb voltage. when fb is lower than 25 % x ref , the switching frequency starts to dec rease from the normal value and drops to 5 % of the normal value when fb is zero. freq can be used to synchronize the internal oscillator rising edge to an external clock falling edge . en sure that the high amplitude of the synchronous (sync) clock is higher than 1.5v and the low amplitude is lower than 1v to drive the internal logic. the recommended external sync frequency is in the range of 100khz and 1mhz. t here is no pulse width requirement , but there is always a parasitic capacitance of the pad . if the p ulse width is too short, a clear rising and falling edge may not be seen due to the parasitic capacitance. a pulse longer than 100ns is recommended in application. enable ( en ) control enable ( en ) is a control pin that turns the reg ulator on and off . drive en hig her than 1.6v to turn on the regulator ; drive en low er than 1.3v to turn off the regulator . t here is no internal pull - up or pull - down circuitry at en, so when en is floating, its status is uncertain. en is clamped internally using a 6. 5 v z ener diode between en and gnd . connecting en to a voltage source directly without any pull - up resistor requires limiting the voltage amplitude to 6v to prevent damage to the z ener diode. en can be connected to a higher voltage (e.g. : vin) through a pull - up resistor if the system
MP4575 C 5 a, 55 v, synchron ous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 15 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. does not have another logic signal acting as the enable signal. en sure that the pull - up resistor is high enough to en sure that the sink current going into en is less than 150 a to avoid damaging the zener diode. for example, when connecting en to v in = 12v , r pull - up (12v - 6. 5 v) 1 5 0a = 37 k?. soft start (ss) soft start (ss) is implemented to ensure a smooth start - up of the output voltage during power - on and power - off . the soft start function also helps to reduce inrush current at start - up . the soft start function is achieve d by ramping ss up slowly and overriding the internal reference (ref) when ss - 900mv is lower than ref. when ss - 900mv is higher than ref, ref regains control. 900mv is the offset voltage of ss , which means that ss is detected as 0 internally when it is lower than 900mv. to minimize the delay for ss to reach 0.9v, an internal pull - up circuit with about 30 a of average current pulls ss up to 600mv first. then use a 4 a c onstant current to charge ss until it reaches 2.5v. when ss is in the range of 0.9v to 1.9v, it overrides ref as the reference voltage of the error amplifier. during this period, the output voltage ramps up from 0 to the regulated value following ss rising. t he soft - start time (t ss ) set by the external ss capacitor can be calculated with equation (1) : (1) w here c ss is the external ss capacitor , v ref is the internal reference voltage (1v), and i ss is the 4 a ss charge current. t he delay time for ss reaching 900mv can be estimated with equation (2) : (2) there is also an internal , fixed , 5 00 s soft start . the final ss time is determined by the longer time between 5 00 s and the external ss setting time. when the output voltage is shorted to gnd, the feedback voltage is pulled low , and then ss is discharged. the MP4575 soft start s again when the short at the output is removed. internal regulator and bias an internal 2.5v regulator powers all of the internal control circuits. this regulator uses vin as the power supply when bias is lower than 3.2v and uses bias as the supply when bias is higher than 3.2v. the vdd regulator powers the low - side driver and the bst regula tor when the vdd voltage is higher than 4.5v. vdd is powered by v in when bias is floating and is regulated at 3.6v. when bias is higher than 4.2v, it power s vdd. vdd increases as bias rises with a 600mv voltage drop and is regulated at 4.8v when bias is hi gher than 5.4v. a 1 f decoupling capacitor is needed at vdd to make the capacitor as close to vdd as possible. using bias to power the internal regulator can improve efficiency. i t is recommended to connect bias to an external power supply in the range of 3.3v to 5.5v. the output voltage is a good choice for this power supply if it is in above range. a 0.1 f to 1 f decoupling capacitor at bias is recommended. over - voltage protection (ovp) the MP4575 monitors the feedback output voltage to achieve over - vol tage protection (ovp) . if the fb voltage is higher than 1 0 3 % x r e f , the MP4575 switches to sleep mode , the hs - fet turn off s, and the ls - fet turn s on to discharge the output energy. the MP4575 return s to normal after the fb voltage drops below 10 3 % x ref. if t he fb voltage is higher than 110% x r e f , the hs - fet and ls - fet are turn ed off immediately . both mosfets are latched , and the pg signal is asserted to indicate the fault status and if en or vin must be recycled to clear the protection. over - current protectio n (ocp) the MP4575 has a cycle - by - cycle peak - current - limit protection and valley current detection protection. the inductor current is monitored during the hs - fet on state. if the inductor current exceeds the current limit value set by v comp , the hs - fet tu rns off immediately. then, the ls - fet is turned on to discharge the energy , and the inductor current decrease s . t he h s - fet does not turn on again until the inductor v alley current is below a certain current a) ( i (v) v (nf) c (ms) t ss ref ss ss ? ? a 4 0.3v (nf) c a 30 0.6v (nf) c (ms) t ss ss _delay ss ? ? ? ?
MP4575 C 5 a, 55 v, synchron ous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 16 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. threshold ( valley current limit ) . this is useful for preventing an inductor current run away. both the peak current limit and the valley current limit value s are dependent on the fb voltage. if the feedback output voltage is higher than 5 0% xref , the current limit value is normal. if the feedback output vo ltage is lower than 5 0% x re f, the current limit decrease s to half the normal value when the feedback output voltage is zero. this feature is useful for reducing ocp thermal dissipation , which may worsen when the output voltage is shorted . it is also useful for reducing high inrush current during start - up. under - voltage lockout ( uvlo ) protection the MP4575 has an input under - voltage lockout (uvlo) protection . when en is active, the MP4575 is powered on when the input voltage is higher than the uvlo rising thr eshold , and is powered off when the input voltage drops below the uvlo falling threshold. thermal shutdown protection the thermal shutdown is employed in the MP4575 by monitoring the ic temperature internally. if the junction temperature exceeds the thresh old (typically 1 70 c ), the regulator shuts off and turns on again when the temperature drops below 1 60 c . there is a hystere sis of about 10 c . p ower good (pg) the MP4575 uses one power good (pg) pin out to indicate normal operation after the soft - start ti me. pg is the open drain of the internal mosfet. pg should be connected to vdd or an external voltage source through a resistor (i.e. : 100k ). after the input voltage is applied, the mosfet is turned on , and pg is pulled to gnd before ss is ready. after the fb voltage reaches 90% of the ref voltage , the mosfet turns off , and pg is pulled high by an external voltage source . when the fb voltage drops to 85 % of the ref voltage, the pg voltage is pulled to gnd to indicate a failure output status. floating driver and bootstrap charging an external bootstrap capacitor ( typically 0.1 f) between bst and sw powers the floating power mosfet driver . thi s floating driver has its own uvlo protection. this uvlos rising threshold is 2 .3 v with a hysteresis of 30 0mv. the driv ers uvlo is soft - start related. when the bootstrap voltage reaches its uvlo thre s hold, the soft - start circuit resets. when the bootstra p uvlo is removed , the soft - start reset is off , and the soft - start process resumes. the dedicated internal bootstrap regulator regulates and charges the bootstrap capacitor to 4.2 v. when the voltage between the bst and sw nodes is less than its regulation, a pmos pass transistor from vin to bst turns on . the ch arging current path is from vin to bst to sw. as long as vin is sufficiently higher than v sw , the bootstrap capacitor can be charge d . when the hs - fet is on , vin v sw , so the bootstrap capacitor cannot be charge d . when the ls - fet is on , the difference between vin and v sw is at its largest, making this the best period to charge. when there is no current in the inductor, v sw = v out , so the difference between vin and v out can charge the bootstrap capacitor. at higher duty cycles, the time period available for bootstrap charging is shorter , so the bootstrap capacitor may not be sufficiently charge d . if the internal circuit does not have sufficient voltage , and the boot strap capacitor is not charged, extra external circuitry can be used to ensure that the bootstrap voltage is within the normal operating region.
MP4575 C 5 a, 55 v, synchronous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 17 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. application informat ion setting the switching frequency the MP4575 has an externally adjustable frequency. th e switching frequency (f s w ) can be set using a resistor at freq (r freq ). table 1 shows recommended r freq value s for various f s w values . refer to the f sw vs. r freq curve in the typical characteristics section on page 8 for more detailed values. table 1 : f s w vs. r freq f sw (khz) r freq (k ) 1000 47.5 900 56 800 63.4 700 73.2 600 84.5 500 102 400 133 300 178 200 261 100 523 setting the output voltage a resistive voltage divider from the output voltage to fb sets the output voltage. the voltage divider divides the output voltage down to the feedback voltage by the ratio shown in equation (3) : (3) calculated the output voltage with equation (4) : (4) for example, if r 1 is 10k?, then r2 can be calculated with equation (5) : (5) so for a 3.3v output voltage, r 1 is 10k?, and r1 is 4.32 k?. selecting the inductor the inductor provides a constant current to the output load while being driven by the switched input voltage. a larger - value inductor result s in a lower ripple current and lower output ripple voltage , but also is physically larger, has a higher series resistance, and lower saturation current. to determine the inductance, allow the inductors peak - to - peak ripple current to equal approximately 30% of the maximum switch current limit. en sure that the peak inductor current is less than the maximum switch current limit. the inductance value can be calculated with equation (6) : (6) where v out is the output voltage, vin is the input voltage, f s is the switching frequency, and ? i l is the peak - to - peak inductor ripple current. choose an inductor that will not saturate under the maximum inductor peak current. the peak inductor current can be calculated with equation (7) : (7) where i load is the load current. selecting the input capacitor the input current to the step - down converter is discontinuous and requires a capacitor to supply ac current to the step - down converter while maintaining the dc input voltage. use c apacitors with low equivalent series resistances (esr) for the best performance. ceramic capacitors are preferred , but tantalum or low - esr electrolytic capacitors may also be sufficient . for simplification, choose an input capacitor with an rms current ra ting greater than half of the maximum load current. the input capacitor (c1) can be electrolytic, tantalum, or ceramic. when using electrolytic or tantalum capacitors, place a small, high - quality, ceramic capacitor (0.1f) as close to the ic as possible. when using ceramic capacitors, en sure that they have enough capacitance to provide a sufficient charge to prevent excessive voltage ripple at the input. the input voltage ripple caused by capacitance can be approximated with equation (8) : fb out r2 v =v r1+r2 ? out fb r1+r2 v =v r2 ? k 1 v 10 r2 out ? ? ? ? ? ? ? ? ? ? ? ? ? ? in out l sw out v v 1 i f v l1 ? ? ? ? ? ? ? ? ? ? ? ? ? ? in out sw out load lp v v 1 l1 f 2 v i i
MP4575 C 5 a, 55 v, synchron ous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 18 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. (8) selecting the output capacitor the output capacitor (c2) maintains the dc output voltage. use ceramic, tantalum, or low - esr electrolytic capacitors. low esr capacitors are recommended to keep the output voltage ripple low. the output voltage ri pple can be estimated with equation (9) : (9) where l is the inductor value , and r esr is the esr value of the output capacitor. for ceramic capacitors, the capacitance dominates the impedance at the switching frequency and contribu tes the most to the output voltage ripple. for simplification, the output voltage ripple can be estimated with equation (10) : (10) for tantalum or electrolytic capacitors, the esr dominates the impedance at the switching frequency. for simplification, the output ripple can be approximated with equation (11) : (11) the characteristics of the output capacitor also affect the stability of the regulation system. the MP4575 can be optimized for a wide range of cap acitances and esr values. compensation components the MP4575 employs current - mode control for easy compensation and fast transient response. comp is the output of the internal error amplifier and controls system stability and transient response. a series r esistor - capacitor combination sets a pole - zero combination to control the control systems characteristics. the dc gain of the voltage feedback loop can be calculated with equation (12) : (12) where a vea is the error amplifier volta ge gain ( 10 00v/v ), g cs is the current - sense transconductance ( 12 a/v ), and r load is the load resistor value. the system has two important poles: one from the compensation capacitor (c 3 ) and the output resistor of error amplifier, and the other due to the o utput capacitor and the load resistor. these poles can be determined with equation (13) and equation (14) : (13) (14) where g ea is the e rror - amplifier transconductance ( 540 a/v ) . the system has one important zero due to the compensation capacitor and the compensation resistor (r 3 ). this zero can be determined with equation (15) : (15) the system may have another significant zero if the output capacitor has a large capacitance or a high esr value. this zero can be determined with equation (16) : (16) in this case, a third pole set by the compensation capacitor (c 4 ) and the compensation resistor can compensate for the effect of the esr zero. this pole can be determ ined with equation (17) : (17) the goal of compensation design is to shape the converter transfer function for a desired loop gain. the system crossover frequency where the feedback lo op has unity gain is important, since lower cros sover frequencies result in slower line and load transient responses, while higher crossover frequencies lead to system instability. generally, set the crossover frequency to ~0.1 x f sw . ? ? ? ? ? ? ? ? ? ? ? ? ? in out in out sw load in v v 1 v v c1 f i v ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? c2 f 8 1 r v v 1 l f v v sw esr in out sw out out ? ? ? ? ? ? ? ? ? ? ? ? ? ? in out 2 sw out out v v 1 c2 l f 8 v v esr in out sw out out r v v 1 l f v v ? ? ? ? ? ? ? ? ? ? ? out fb vea cs load vdc v v a g r a ? ? ? ? vea ea p1 a c3 2 g f ? ? ? load p2 r c2 2 1 f ? ? ? r3 c3 2 1 f z1 ? ? ? esr esr r c2 2 1 f ? ? ? r3 c4 2 1 f p3 ? ? ?
MP4575 C 5 a, 55 v, synchron ous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 19 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. use the following steps to design the compensation: 1. choose r 3 to set t he desired crossover frequency . r3 can be determined with equation (18) : (18) where f c is the desired crossover frequency. 2. choose c 3 to achieve the desired phase margin. for applications with typical inductor values, set the compe nsation zero (f z1 ) to <0.25 x f c to provide a sufficient phase margin. c 3 can be calculated with equation (19) : (19) 3. determine if c 4 is required . c4 is required if the esr zero of the outp ut capacitor is located at <0.5x f sw , or equat ion (20) is valid: (20) if this is the case, use c 4 to set the pole (f p3 ) at the location of the esr zero. determine c 4 with equation (21) : (21) external b ootstrap diode f or high duty - cycle operation s wher e v out / v in > 65% , the time period available to the bootstrap charging is less , so the bootstrap capacitor may not be charged sufficiently . t his affects efficiency and normal operation. a n external bootstrap diode from the 3v - 5v rail to bst can help charg e the bootstrap capacitor and enhance efficiency (see figure 2) . the output voltage is a good choice for this power supply if it is in above range. the bootstrap diode can be a low - cost one such as in4148 or bat54. figure 2 : e xternal bootstrap diode at no load or light load, the converter may operate in pulse - skipping mode to maintain the output - voltage regulation. u nder this condition, v sw = v out for most of the time , so the diode from v out to bst cannot charge the bootstrap c apacitor . for a sufficient gate voltage during pulse - skipping mode , vin - v out should be no less than 3v. for example, if v out = 3.3v, then vin must exceed 3.3v + 3v = 6.3v to maintain a sufficient bootstrap voltage at no load or light load. to meet this r equirement, en can program the input uvlo voltage to v out + 3v . fb out cs ea c v v g g f c2 2 r3 ? ? ? ? ? c f r3 2 4 c3 ? ? ? 2 f r c2 2 1 sw esr ? ? ? r3 r c2 c4 esr ? ? c b s t c o u t l b s t s w 3 v - 5 v r a i l 1 n 4 1 4 8 v o u t
MP4575 C 5 a, 55 v, synchron ous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 20 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. pcb layout guide lines efficient pcb layout is critical for stab le operation . for best results, refer to figure 3 and follow the guidelines below. 1. place the ceramic input capacitor , especiall y the small package size (0603) input bypass capacitor , as close to in and gnd as possible. 2. keep the connection of the input capacitor and v in as short and wide as possible. 3. place the v dd capacitor to v dd and gnd as close as possible. 4. use a large ground p lane to directly connect to gnd. 5. add vias near gnd if the bottom layer is a ground plane. 6. route sw and bst away from sensitive analog areas such as fb. 7. ensure that all feedback connections are short and direct. 8. place the feedback resistors as close to th e chip as possible. 9. connect v in, sw, and especially gnd and the exposed pad to large copper areas to cool the chip for improved thermal performance and long - term reliability. top layer inner layer 1 inner layer 2 bottom layer figure 3 : recommend ed pcb layout
MP4575 C 5 a, 55 v, synchronous , step - down converter MP4575 rev. 1.0 www.monolithicpower.com 21 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical application circuit figure 4 : 3.3v output typical application circuit g n d e n v i n g n d v o u t 1 m r 4 4 . 3 2 k r 2 1 0 k r 1 2 . 2 f c 1 a 1 n f c 3 0 . 1 f c 7 0 . 1 f c 2 c 4 7 f c 2 a 4 7 f c 2 b 1 0 h l 1 2 . 2 f c 1 b 4 . 5 v - 5 5 v 3 . 3 v @ 5 a 0 . 1 f c 1 c n s r 5 2 2 0 p f c 4 4 . 9 9 k r 3 1 f c 8 1 0 2 k r 7 1 0 0 k r 6 p g 1 f c 5 0 . 1 f c 6 1 n 4 1 4 8 d 1 s w b s t 5 v i n e n 4 c o m p 1 f b 2 v d d 1 6 g n d b i a s 1 7 s s 1 9 a g n d 2 0 f r e q 3 p g 1 8 m p 4 5 7 5 1 0 , 1 1 6 , 7 , 8 1 3 , 1 4 , 1 5 u 1 6 8 0 p f c 9
MP4575 C 5 a, 55 v, synchronous , step - down converter notice: the information in this document is subject to change without notice. users should warrant and guarantee that third party intellectual property rights are not infringed upon when integrating mps produc ts into any application. mps will not assume any legal responsibility for any said applications. MP4575 rev. 1 .0 www.monolithicpower.com 22 8/16/2016 mps proprietary information. patent protected . unauthorized photocopy an d duplication prohibited. ? 2016 mps. all rights reserved. package information tssop - 20 e p ( exposed pad )

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